A #RISCV 64-bit CPU core licensed under #gpl3 that can actually boot #Linux

#openhardware is getting more feasible even to the core!




– Our goal is >4 IPC (average) with >97% branch prediction and lots of cache, deep out-of-order pipelines and speculative execution for managing cache and branch miss latency
– General long term goal is a high end server class CPU, 5GHz+, multithreaded, 100+ instructions in flight at any one time

that reads like:

"I'm not sure we need to apply any learning from Spectre & Meltdown, we really just want a big CPU like Intel has, that goes vroom. but being GPL, it won't be controlled by Intel. It can instead be controlled by all other big corps."

It is true out-of-order execution is ripe for exploits and I am both surprised and not at all surprised to see it implemented in #riscv cores. The speed benefits are a powerful draw.

When talking about the #pinebook vs. #pinebookpro I often mention that the pinebook is immune to #spectre and #meltdown attacks. It is also a lot slower. Same holds true for #pinephone vs. #pinephonepro, apparently.

Nice thing about a #gpl licensed core is you could disable the (mis)feature!

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